Crystal oscillation device and semiconductor device

摘要

A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.

主权项

1. A crystal oscillation device comprising:
first and second external terminals which are terminals for connection of a quartz crystal unit provided externally and arranged adjacent to each other; a semiconductor chip having an uppermost layer; and first and second connection parts which connect the semiconductor chip and the first and second external terminals to each other, wherein the semiconductor chip comprises:
first, second and third regions arranged adjacent to one another sequentially in a first direction; andan oscillation circuit region arranged near the first, second and third regions in a second direction perpendicular to the first direction and having an inverting logic circuit formed therein, wherein a first pad connected to the first external terminal via the first connection part and connected to an input node of the inverting logic circuit via a first signal wiring is formed in the first region, wherein a second pad connected to the second external terminal via the second connection part and connected to an output node of the inverting logic circuit via a second signal wiring is formed in the third region, wherein a first power source wiring, extending toward the oscillation circuit region, is formed in the second region using a first metal wiring layer in the uppermost layer of the semiconductor chip, and wherein the first and the second connection parts are formed using a second metal wiring layer positioned below the first metal wiring layer.