发明名称 Through silicon via structure
摘要 A system and method for manufacturing a through silicon via is disclosed. An embodiment comprises forming a through silicon via with a liner protruding from a substrate. A passivation layer is formed over the substrate and the through silicon via, and the passivation layer and liner are recessed from the sidewalls of the through silicon via. Conductive material may then be formed in contact with both the sidewalls and a top surface of the through silicon via.
申请公布号 US9299676(B2) 申请公布日期 2016.03.29
申请号 US201514609210 申请日期 2015.01.29
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Yu Chen-Hua;Jeng Shin-Puu;Chiou Wen-Chih;Tsai Fang Wen;Tsai Chen-Yu
分类号 H01L23/495;H01L23/00;H01L23/48;H01L21/683;H01L25/065 主分类号 H01L23/495
代理机构 Slater & Matsil, L.L.P. 代理人 Slater & Matsil, L.L.P.
主权项 1. A semiconductor device comprising: a through silicon via protruding from a substrate, the through silicon via having a sidewall; a liner extending along the sidewall away from the substrate, the liner terminating prior to reaching a top surface of the through silicon via; a passivation layer comprising a first upper surface a first distance away from the substrate and a second upper surface a second distance away from the substrate, the second distance being greater than the first distance, the second upper surface being adjacent to the liner, wherein the passivation layer is an insulating layer; a conductive material over and in physical contact with the sidewall and the top surface of the through silicon via; and a first external device in electrical connection with the through silicon via through the conductive material.
地址 Hsin-Chu TW
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