Adaptive delay based asynchronous successive approximation analog-to-digital converter

摘要

An asynchronous SAR ADC converts an analog signal into a series of digital pulses in an efficient, low power manner. In synchronous SAR ADC circuits, a separate and cumbersome clock signal is used to trigger the internal circuitry of the SAR ADC. Instead of triggering the components of the SAR DAC synchronously with a clock signal, the asynchronous solution uses its own internal signals to trigger its components in an asynchronous cyclic manner. Further, in order to increase efficiency and guard against circuit failures due to difficulties arising from transient signals, the asynchronous SAR ADC may also include a delay circuit for introducing a variable delay to the SAR ADC cycle.

主权项

1. An analog to digital converter, comprising:
a differencing circuit configured to receive as input a sampled differential input voltage and a fraction of a reference voltage and to generate a differential output voltage representing a difference between the sampled differential input voltage and the fraction of the reference voltage; a delay circuit configured to generate a delay signal having a delay value that is a function of said differential output voltage; a comparison circuit configured to receive as input the differential output voltage and to generate an output signal as a function of a sign of the differential output voltage when triggered by a trigger signal derived from the delay signal; and control logic configured to receive the output signal and generate said fraction of the reference voltage as a function of the output signal.