发明名称 Three-dimensional power supply module with passive stacked over cavity
摘要 A power converter sub-assembly/module includes a power switching assemblage defining a cavity within which can be mounted a driver IC. The power switching assemblage includes a load inductor component stack attached to a power transistor block and an interconnect spacer block, defining a cavity between the two blocks. The power transistor block includes a high and low side FETs attached side-by-side to a switch-node metal carrier that includes an attach-surface opposite the FETs. The power switching assemblage is mountable to an interconnect surface that includes connection pads VIN, VOUT, GND, HG (high-side gate) and LG low-side gate). For a module configuration, the power switching assemblage is combined with a driver IC that provides high (HG) and low (LG) gate drive—the power switching assemblage and the driver IC are mounted to a module interconnect substrate, with the driver IC mounted within the cavity of the power switching assemblage.
申请公布号 US9300222(B2) 申请公布日期 2016.03.29
申请号 US201414483925 申请日期 2014.09.11
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 Moss James Ignatius
分类号 H05K7/00;H02M7/00;H01L29/00;H05K1/18;H02M3/158 主分类号 H05K7/00
代理机构 代理人 Viger Andrew;Cimino Frank D.
主权项 1. A power converter module, adapted for mounting on a circuit board, and operable as a half-bridge switched mode power converter, comprising: a module interconnect substrate carrier adapted for mounting on a circuit board, and including a module interconnect surface with connection pads VIN, VOUT, GND, HG and LG, and a cavity area; a driver IC configured to provide high-side gate drive through an HG output, and low-side gate drive through an LG output, the driver IC mounted to the module interconnect surface in the cavity area, with the HG and LG outputs connected respectively to the HG and LG pads; a power transistor block including a high-side FET and a low-side FET attached side-by-side to a switch-node metal carrier: the high-side drain-down FET including a source attached to the switch-node metal carrier, an underside drain with a VIN input, and a gate with an underside HG input; andthe low-side source-down FET including a drain attached to the switch-node metal carrier, an underside source with a ground GND terminal, and a gate with an underside LG input;the power transistor block mounted to the module interconnect surface adjacent the cavity area with the VIN input and GND terminal connected respectively to the VIN and GND pads; an interconnect spacer block configured to provide electrical interconnection between a top-side attachment surface and an underside VOUT output, the interconnect spacer block mounted to the module interconnect surface adjacent the cavity area, opposite the power transistor block, with the VOUT output connected to the VOUT pad; and a load inductor component configured for stacked attachment to the switch-node metal carrier of the power transistor block, and to the top-side attachment surface of the interconnect spacer block, the load inductor component suspended over the cavity area; such that the load inductor, power transistor block and interconnect spacer define a cavity.
地址 Dallas TX US