| 主权项 |
1. A memory system comprising:
a circuit card; a separable area array connector on the circuit card; a first group of memory devices positioned on the circuit card, wherein the first group of memory devices is configured to communicate with a main processor of a computer system via the separable area array connector; a second group of memory devices positioned on the circuit card, the second group of memory devices operable to communicate with the first group of memory devices on the circuit card, wherein each of the memory devices in the first group and the second group of memory devices is a separate buffered memory stack; and a plurality of channels to couple the second group of memory devices to a plurality of inline memory modules via a connector of the circuit card, wherein the separable area array connector connects to a plurality of processor sockets on a main circuit board, and the main processor on the main circuit board is configured to communicate with the first group of memory devices through the separable area array connector, with the second group of memory devices through the first group of memory devices, and with the inline memory modules through the second group of memory devices, wherein the separable area array connector comprises shorter range and lower power links relative to the channels of the connector. |
