发明名称 Integrated circuit packaging system with patterned substrate and method of manufacture thereof
摘要 A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a component side and a system side; depositing a solder resist layer on the component side of the package substrate; patterning groups of access openings and a die mount opening in the solder resist layer; attaching an integrated circuit die in the die mount opening; forming conductive contacts in the access openings; and attaching system interconnects to the system side of the package substrate including controlling a coplanarity of the system interconnects by the solder resist layer.
申请公布号 US9299648(B2) 申请公布日期 2016.03.29
申请号 US201012714291 申请日期 2010.02.26
申请人 STATS ChipPAC Ltd. 发明人 Shim Il Kwon;Chow Seng Guan;Kuan Heap Hoe
分类号 H01L23/02;H01L23/498;H01L23/31;H01L25/10 主分类号 H01L23/02
代理机构 Ishimaru & Associates LLP 代理人 Ishimaru & Associates LLP
主权项 1. A method of manufacture of an integrated circuit packaging system comprising: providing a package substrate having a component side and a system side; depositing a solder resist layer on the component side of the package substrate, the solder resist layer having a thickness range of 50 to 150 μm for preventing warpage of the package substrate; patterning groups of access openings and a die mount opening in the solder resist layer; attaching an integrated circuit die in the die mount opening; forming conductive contacts in the access openings; and attaching system interconnects to the system side of the package substrate.
地址 Singapore SG