发明名称 High aspect ratio plasma etch for 3D NAND semiconductor applications
摘要 Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.
申请公布号 US9299580(B2) 申请公布日期 2016.03.29
申请号 US201414462817 申请日期 2014.08.19
申请人 APPLIED MATERIALS, INC. 发明人 Kong Byungkook;Lee Gene;Yang Liming
分类号 H01L21/20;H01L21/311;H01L27/115 主分类号 H01L21/20
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A method of etching a material layer disposed on a substrate using synchronized RF pulses comprising: providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate; synchronously pulsing a RF source power and a RF bias power into the etching gas mixture, wherein an energy ratio of the RF source power to the RF bias power is about less than 0.5; and etching the film stack disposed on the substrate.
地址 Santa Clara CA US