Output Buffer, and Source Driver and Display Device Including the Same

摘要

Disclosed is an output buffer. The output buffer includes a first amplifier configured to amplify an input signal, and output first to fourth amplified signals according to results of the amplification, a first transistor to receive the first amplified signal, a second transistor to receive the second amplified signal, a third transistor to receive the third amplified signal, a fourth transistor to receive the fourth amplified signal, a first node, connected to drains of the first and second transistors, a second node, connected to drains of the third and fourth transistors, an output node connected to the first and second nodes, and a first controller configured to selectively supply a control voltage to the gates of the first to fourth transistors in response to a control signal.

主权项

1. An output buffer comprising:
a first amplifier configured to amplify an input signal and output first to fourth amplified signals; a first transistor comprising a first drain, a first gate configured to receive the first amplified signal, and a first source; a second transistor comprising a second drain connected to the first drain at a first node, a second gate configured to receive the second amplified signal, and a second source; a third transistor comprising a third drain, a third gate configured to receive the third amplified signal, and a third source connected to the second source; a fourth transistor comprising a fourth drain connected to the third drain at a second node, a fourth gate configured to receive the fourth amplified signal, and a fourth source; an output node connected to the first and second nodes; and a first controller configured to selectively supply a control voltage to the first to fourth gates in response to a control signal.