发明名称 DUMMY BIT LINE MOS CAPACITOR AND DEVICE USING THE SAME
摘要 A MOS capacitor, a method of fabricating the same, and a semiconductor device using the same are provided. The MOS capacitor is arranged in an outermost cell block of the semiconductor device employing an open bit line structure. The MOS capacitor includes a first electrode arranged in a semiconductor substrate, a dielectric layer arranged on a semiconductor substrate, and a second electrode arranged on the dielectric layer and including a dummy bit line.
申请公布号 US2016087072(A1) 申请公布日期 2016.03.24
申请号 US201514961815 申请日期 2015.12.07
申请人 SK hynix Inc. 发明人 LIM Jeong Sub
分类号 H01L29/66;H01L27/108;H01L21/768;H01L21/265;H01L21/02 主分类号 H01L29/66
代理机构 代理人
主权项
地址 Icheon KR