SYNCHRONIZING A TRANSLATION LOOKASIDE BUFFER WITH PAGE TABLES

摘要

The translation lookaside buffer (TLB) of a processor is kept in synchronization with a guest page table by use of an indicator referred to as a “T” bit. The T bit of the NPT/EPT entries mapping the guest page table are set when a page walk is performed on the NPT/EPT. When modifications are made to pages mapped by NPT/EPT entries with their T bit set, changes to the TLB are made so that the TLB remains in synchronization with the guest page table. Accordingly, record/replay of virtual machines of virtualized computer systems may be performed reliably with no non-determinism introduced by stale TLBs that fall out of synchronization with the guest page table.

主权项

1. A computer readable storage medium containing program instructions for maintaining synchronization between an address translation cache of a processor and a guest page table in a virtualized computer system, in which guest software maintains the guest page table containing address translations from guest virtual addresses to guest physical addresses, and virtualization software maintains a second page table containing address translations from guest physical addresses to machine addresses, the processor using the guest page table and the second page table to determine translations from guest virtual addresses to machine addresses, wherein execution of the program instructions by the processor of the virtualized computer system causes the processor to carry out the steps of:
marking entries in the second page table that map to guest page table pages to indicate that the entries map to guest page table pages, wherein the second page table contains address translations from guest physical addresses to machine addresses; modifying the contents of the address translation cache to ensure that, upon an attempt by guest software to write to a guest page table page, the processor refers to the second page table to determine the machine address of the guest page table page, instead of using a cached address translation to determine the machine address of the guest page table page; and upon a write by guest software to a memory page and as a synchronous programmatic response thereto, if the processor refers to the second page table to determine a machine address for the memory page, determining whether the entry in the second page table that contains the machine address for the memory page indicates that the memory page is a guest page table page, and, if the memory page is a guest page table page, modifying the contents of the address translation cache to eliminate an inconsistency between the address translation cache and the guest page table caused by the write to the guest page table page.