发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, APPARATUS WITH SEMICONDUCTOR INTEGRATED CIRCUIT, AND CLOCK CONTROL METHOD IN SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 A semiconductor integrated circuit includes, a fixed frequency-division clock generation unit configured to generate a fixed frequency-division clock with a fixed frequency based on an output clock of a clock source, a variable frequency-division clock generation unit configured to generate a variable frequency-division clock with a variable frequency based on the output clock of the clock source, and a data path selection unit configured to select a data path. The data path selection unit selects a data path with or without a synchronization unit for converting the data into clock-synchronous data on a receiving side according to whether the variable frequency-division clock is or is not, respectively, generated by the variable frequency-division clock generation unit.
申请公布号 US2016087618(A1) 申请公布日期 2016.03.24
申请号 US201514856253 申请日期 2015.09.16
申请人 CANON KABUSHIKI KAISHA 发明人 Niitsuma Hiroaki
分类号 H03K5/135;G11C11/4076 主分类号 H03K5/135
代理机构 代理人
主权项 1. A semiconductor integrated circuit comprising: a fixed frequency-division clock generation unit configured to generate a fixed frequency-division clock with a fixed frequency based on an output clock of a clock source; a variable frequency-division clock generation unit configured to generate a variable frequency-division clock with a variable frequency based on the output clock of the clock source; and a data path selection unit configured to select a data path as a data path for transferring data between a first functional module operating based on the fixed frequency-division clock and a second functional module operating based on the variable frequency-division clock, wherein, while the variable frequency-division clock is generated by the variable frequency-division clock generation unit, the data path selection unit selects a data path using a synchronization unit for converting the data into clock-synchronous data on a receiving side, and wherein, while the variable frequency-division clock is not generated by the variable frequency-division clock generation unit, the data path selection unit selects a data path without using the synchronization unit.
地址 Tokyo JP