SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS

摘要

Some embodiments include apparatuses and methods for activating a signal associated with an access line coupled to different groups of memory cells during a memory operation of a device, and for sensing data lines of the device during different time intervals of the memory operation to determine the value of information stored in the memory cells. Each of the data lines can be coupled to a respective memory cell of each of the groups of memory cells. In at least one of such apparatuses and methods, the signal applied to the access line can remain activated during the memory operation.

主权项

1. An apparatus comprising:
data lines; an access line; a first group of memory cells coupled to the access line, each of the data lines coupled to a respective memory cell in the first group of memory cells; a second group of memory cells coupled to the access line, each of the data lines coupled to a respective memory cell in the second group of memory cells; a module to determine, during a first time interval of a memory operation, values of information stored in the first group of memory cells, to determine, during a second time interval of the memory operation, values of information stored in the second group of memory cells, and to apply a signal having a positive voltage value to the access line during the first and second time intervals and during a time interval between the first and second time intervals.