发明名称 MEMORY DEVICE WITH DYNAMICALLY OPERATED REFERENCE CIRCUITS
摘要 This invention concerns a semiconductor memory device comprising: at least one sense amplifier circuit for reading data sensed from selected memory cells in a memory array, at least one reference circuit, each reference circuit being a replica of the sense amplifier circuit and having an output through which the reference circuit delivers an output physical quantity, a regulation network providing a regulation signal to each sense amplifier circuit and each reference circuit, wherein the regulation signal is derived from an averaging of the output physical quantity over time and/or space, wherein the regulation network comprises a control unit configured to sum up the physical quantities of each output of the reference circuit and a target mean value, the control unit delivering a regulation signal based on the sum, the regulation signal being fed in to each regular sense amplifier circuit and to each reference circuit.
申请公布号 US2016086652(A1) 申请公布日期 2016.03.24
申请号 US201414785955 申请日期 2014.04.24
申请人 SOITEC 发明人 Thewes Roland;Ferrant Richard
分类号 G11C11/4091;G11C11/4096 主分类号 G11C11/4091
代理机构 代理人
主权项 1. A semiconductor memory device comprising: at least one sense amplifier circuit (SAi) for reading data sensed from selected memory cells in a memory array; at least one reference circuit (RSAj), each reference circuit (RSAj) being a replica of the sense amplifier circuit (SAi) and having an output (OUTj) through which the reference circuit (RSAj) delivers an output physical quantity; a regulation network providing a regulation signal (REG) to each sense amplifier circuit (SAi) and each reference circuit (RSAj), wherein the regulation signal (REG) is derived from an averaging of the output physical quantity over time and/or space; wherein the regulation network comprises a control unit (CU) configured to sum up the physical quantities of each output (OUTj) of said-the reference circuit (RSAj) and a target mean value, wherein the physical quantities of the output (OUTj) of the reference circuit (RSAj) and the target mean value are summed up with opposite signs, the control unit delivering a regulation signal (REG) based on the sum, the regulation signal (REG) being fed in to each regular sense amplifier circuit (SAi) and to each reference circuit (RSAj).
地址 Bernin FR