VARIABLE RESISTANCE MEMORY

摘要

A variable resistance memory according to one embodiment of the present invention is provided with: a semiconductor layer (AA1); a gate electrode (27) that covers the upper surface and the lateral surface of the semiconductor layer (AA1); a first conductive line (SLj) that is connected to a first end of the semiconductor layer (AA1); a variable resistance element (MTJ) that is connected to a second end of the semiconductor layer (AA1); a second conductive line (BLj) that is connected to the variable resistance element (MTJ); and a third conductive line (WLi) that is connected to the gate electrode (27). The first and second conductive lines (SLj, BLj) are arranged between the semiconductor layer (AA1) and the third conductive line (WLi).