| 摘要 |
A non-volatile memory device and method for programming cells using repeated pulses of program voltages, with interleaved read operations to determine the level of read current, until the desired programming state is achieved. Each successive program pulse has one or more program voltages increased by a step value relative to the previous pulse. For a single level cell type, each cell is individually removed from the programming pulses after reaching a first read current threshold, and the step value is increased for one or more kicker pulses thereafter. For a multi-level cell type, the step value drops after one of the cells reaches a first read current threshold, some cells are individually removed from the programming pulses after reaching a second read current threshold while others are individually removed from the programming pulses after reaching a third read current threshold. |
| 主权项 |
1. A method of programming a memory device having memory cells each including source and drain regions in a semiconductor substrate with a channel region therebetween, a floating gate disposed over and affecting a conductivity of at least a portion of the channel region, and one or more additional conductive gates insulated from the floating gate and the substrate, wherein each memory cell is programmable by applying programming voltages to the source region and the one or more additional conductive gates to cause electrons originating from the drain region to be injected onto the floating gate, and wherein a program state of each memory cell is readable by applying a voltage differential between the source and the drain regions and measuring a read current in the channel region, the method comprising:
1) applying a pulse of programming voltages to the source regions and the one or more conductive gates for a plurality of the memory cells, 2) reading program states of the plurality of memory cells, and 3) repeating steps 1 and 2 until at least one of the plurality of memory cells exhibits a read current in step 2 which reaches a first threshold value, wherein the repeating of steps 1 and 2 includes increasing at least one of the programming voltages of step 1 by a first step value each time step 1 is repeated; after the first threshold value has been reached, for each of a first subset of the plurality of memory cells:
4) applying a pulse of programming voltages to the source region and the one or more conductive gates of the memory cell,5) reading a program state of the memory cell, and6) repeating steps 4 and 5 until the memory cell exhibits a read current in step 5 which reaches a second threshold value different from the first threshold value, wherein the repeating of steps 4 and 5 includes increasing at least one of the programming voltages of step 4 by a second step value each time step 4 is repeated, wherein the second step value is less than the first step value; and after the first threshold value has been reached, for each of a second subset of the plurality of memory cells:
7) applying a pulse of programming voltages to the source region and the one or more conductive gates of the memory cell,8) reading a program state of the memory cell, and9) repeating steps 7 and 8 until the memory cell exhibits a read current in step 8 which reaches a third threshold value different from the first and second threshold values, wherein the repeating of steps 7 and 8 includes increasing at least one of the programming voltages of step 7 by a third step value each time step 7 is repeated, wherein the third step value is less than the first step value. |
