| 发明名称 |
Digital to analog converter discharge circuit and associated method for analog to digital converter circuits |
| 摘要 |
A circuit includes an amplifier circuit that receives a residue voltage from an output capacitor connected to an output of a digital to analog converter (DAC). The DAC is employed in a pipeline stage of an analog to digital converter (ADC). The amplifier circuit provides a scaled output voltage based on the residue voltage. A sample circuit samples the scaled output voltage during a first portion of a hold phase of the DAC. A discharge circuit supplies the sampled scaled output voltage to the output of the DAC during a second portion of the hold phase of the DAC to mitigate settling time of the DAC. |
| 申请公布号 |
US9294116(B2) |
申请公布日期 |
2016.03.22 |
| 申请号 |
US201514643528 |
申请日期 |
2015.03.10 |
| 申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
Joish Rajendrakumar |
| 分类号 |
H03M1/44;H03M1/14;H03M1/66;H03M1/12 |
主分类号 |
H03M1/44 |
| 代理机构 |
|
代理人 |
Albin Gregory J.;Cimino Frank D. |
| 主权项 |
1. A circuit comprising:
an amplifier circuit that receives a residue voltage from an output capacitor connected to an output of a digital to analog converter (DAC), the DAC being employed in a pipeline stage of an analog to digital converter (ADC), the amplifier circuit providing a scaled output voltage based on the residue voltage; a sample circuit that samples the scaled output voltage during a first portion of a hold phase of the DAC; and a discharge circuit that supplies the sampled scaled output voltage to the output of the DAC during a second portion of the hold phase of the DAC to mitigate settling time of the DAC. |
| 地址 |
Dallas TX US |
