Solar cell

摘要

A solar cell including a first conductive type semiconductor substrate; a first intrinsic semiconductor layer on a front surface of the semiconductor substrate; a first conductive type first semiconductor layer on at least one surface of the first intrinsic semiconductor layer; a second conductive type second semiconductor layer on a back surface of the semiconductor substrate; a second intrinsic semiconductor layer between the second semiconductor layer and the semiconductor substrate; a first conductive type third semiconductor layer on the back surface of the semiconductor substrate, the third semiconductor layer being spaced apart from the second semiconductor layer; and a third intrinsic semiconductor layer between the third semiconductor layer and the semiconductor substrate.

主权项

1. A solar cell, comprising:
a first conductive type semiconductor substrate; a first intrinsic semiconductor layer on a front surface of the semiconductor substrate; a first conductive type first semiconductor layer on at least one surface of the first intrinsic semiconductor layer; a multi-layered passivation layer on a back surface of the semiconductor substrate having a first opening to the back surface of the semiconductor substrate and a second opening to the back surface of the semiconductor substrate, wherein the back surface of the semiconductor substrate is substantially planar; a second conductive type second semiconductor layer over the semiconductor substrate inside the first opening and over a side wall of the first opening; a second intrinsic semiconductor layer on the semiconductor substrate inside the first opening between the second semiconductor layer and the semiconductor substrate and on the side wall of the first opening between the second semiconductor layer and the multi-layered passivation layer; a first conductive type third semiconductor layer over the semiconductor substrate inside the second opening and over a side wall of the second opening, wherein the third semiconductor layer is spaced apart from the second semiconductor layer; and a third intrinsic semiconductor layer on the semiconductor substrate inside the second opening between the third semiconductor layer and the semiconductor substrate and on the side wall of the second opening between the third semiconductor layer and the multi-layered passivation layer.