发明名称 Semiconductor device
摘要 To provide a semiconductor device which can be miniaturized or highly integrated. To obtain a semiconductor device including an oxide semiconductor, which has favorable electrical characteristics. To provide a highly reliable semiconductor device including an oxide semiconductor, by suppression of a change in its electrical characteristics. The semiconductor device includes an island-like oxide semiconductor layer over an insulating surface; an insulating layer surrounding a side surface of the oxide semiconductor layer; a source electrode layer and a drain electrode layer in contact with top surfaces of the oxide semiconductor layer and the insulating layer; a gate electrode layer overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode layer. The source electrode layer and the drain electrode layer are provided above the top surface of the oxide semiconductor layer. The top surface of the insulating layer is planarized.
申请公布号 US9293540(B2) 申请公布日期 2016.03.22
申请号 US201314091634 申请日期 2013.11.27
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamazaki Shunpei
分类号 H01L29/24;H01L29/786 主分类号 H01L29/24
代理机构 Nixon Peabody LLP 代理人 Nixon Peabody LLP ;Costellia Jeffrey L.
主权项 1. A semiconductor device comprising: a first oxide layer over an insulating surface; an oxide semiconductor layer over the first oxide layer; a second oxide layer over the oxide semiconductor layer; an insulating layer surrounding a side surface of the oxide semiconductor layer; a source electrode and a drain electrode in contact with a top surface of the insulating layer; a gate electrode overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode, wherein the source electrode and the drain electrode are electrically connected to the oxide semiconductor layer, wherein a side surface of the first oxide layer and the side surface of the oxide semiconductor layer are substantially perpendicular to the insulating surface, and wherein the top surface of the insulating layer is planarized, wherein the oxide semiconductor layer comprises a first region in electrical contact with the source electrode, wherein the oxide semiconductor layer comprises a second region in electrical contact with the drain electrode, wherein the oxide semiconductor layer comprises a third region comprising a channel, wherein the third region is provided between the first region and the second region, wherein a width of the first oxide layer in a channel length direction is greater than a width of the third region of the oxide semiconductor layer in the channel length direction, wherein a width of the third region of the oxide semiconductor layer in the channel length direction is greater than a width of the second oxide layer in the channel length direction, and wherein each of an end portion of the source electrode and an end portion of the drain electrode is interposed between the oxide semiconductor layer and the second oxide layer.
地址 Kanagawa-ken JP