Stack access tracking

摘要

A processor employs a prediction table at a front end of its instruction pipeline, whereby the prediction table stores address register and offset information for store instructions; and stack offset information for stack access instructions. The stack offset information for a corresponding instruction indicates the entry of the stack accessed by the instruction stack relative to a base entry. The processor uses pattern matching to identify predicted dependencies between load/store instructions and predicted dependencies between stack access instructions. A scheduler unit of the instruction pipeline uses the predicted dependencies to perform store-to-load forwarding or other operations that increase efficiency and reduce power consumption at the processing system.

主权项

1. A method comprising:
identifying, at an instruction pipeline of a processor, a first entry of a stack to be accessed by a first stack access instruction by identifying a first offset from a base of the stack based on the first stack access instruction; identifying, at the instruction pipeline, a second entry of the stack to be accessed by a second stack access instruction by identifying a second offset from the base of the stack based on the second stack access instruction; and identifying a dependency between the first stack access instruction and the second stack access instruction in response to the first offset matching the second offset.