Semiconductor device with seal ring with embedded decoupling capacitor

摘要

A seal ring for semiconductor devices is provided with embedded decoupling capacitors. The seal ring peripherally surrounds an integrated circuit chip in a seal ring area. The at least one embedded decoupling capacitor may include MOS capacitors, varactors, MOM capacitors and interdigitized capacitors with multiple capacitor plates coupled together. The opposed capacitor plates are coupled to different potentials and may advantageously be coupled to Vdd and Vss.

主权项

1. A semiconductor integrated circuit comprising:
an integrated circuit formed over a semiconductor substrate; an inner seal ring surrounding said integrated circuit and comprising a plurality of first metallization sections; an outer seal ring including a plurality of second metallization sections surrounding said inner seal ring, said inner seal ring connected to a different potential than said outer seal ring; and at least two decoupling capacitors embedded completely within said inner seal ring or said outer seal ring, at least one of the decoupling capacitors comprising a MOS (metal oxide semiconductor) capacitor including:
a polysilicon lead conductively coupled to one of the first metallization sections of the inner seal ring, first and second dopant impurity regions formed within said semiconductor substrate and conductively coupled to respective second metallization sections of the outer seal ring, and a capacitor dielectric formed on said semiconductor substrate between said dopant impurity regions.