发明名称 LDMOS with no reverse recovery
摘要 A transistor includes a source region including a first impurity region implanted into a substrate, a drain region including a second impurity region implanted into the substrate, and a gate including an oxide layer formed over the substrate and a conductive material formed over the oxide layer, the oxide layer comprising a first side and a second side, the first side formed over a portion of the first impurity region and the second side formed over a portion of the second impurity region, the first side having a thickness of less than about 100 Å, and the second side having a thickness equal to or greater than 125 Å.
申请公布号 US9293577(B2) 申请公布日期 2016.03.22
申请号 US201012750568 申请日期 2010.03.30
申请人 Volterra Semiconductor LLC 发明人 Zuniga Marco A.
分类号 H01L29/66;H01L29/78;H01L29/423;H01L21/265;H01L29/08 主分类号 H01L29/66
代理机构 Lathrop & Gage LLP 代理人 Lathrop & Gage LLP
主权项 1. A transistor comprising: a source region including a first impurity region of a first impurity type implanted into a well region, also of the first impurity type, implanted on a substrate and a third impurity region of an opposite second impurity type abutting the first impurity region, and a fourth impurity region of the second impurity type surrounding the first impurity region and the third impurity region, the fourth impurity region having a lower doping concentration than the third impurity region; a drain region including a second impurity region of the first impurity type implanted into the substrate, the drain region further including a fifth impurity region of the first impurity type surrounding the second impurity region, the fifth impurity region having a lower doping concentration than the second impurity region; an intrinsic diode between the fourth impurity region and the drain region, the intrinsic diode formed by the fourth impurity region of the second impurity type and the well region of the first impurity type; and a gate including an oxide layer formed over the substrate and a conductive material formed over the oxide layer, the oxide layer comprising a first side and a second side, the first side formed over a portion of the first impurity region and the second side formed over a portion of the second impurity region, the first side having a thickness such that a turn-on voltage of the transistor is less than a forward bias turn-on voltage of the intrinsic diode; wherein: the fourth impurity region has a doping concentration of the second impurity type graded in a vertical direction such that doping concentration of the second impurity type increases when moving in the vertical direction from a surface adjacent to the oxide layer towards the substrate, and the doping concentration of the second impurity type in the fourth impurity region at the surface adjacent to the oxide layer is less than one-half of the doping concentration of the second impurity type at a portion of the fourth impurity region closest to the substrate, and a thickness of the first side of the oxide layer is greater than zero and less than 70 Å.
地址 San Jose CA US