| 摘要 |
The invention provides a liquid crystal display device that includes an IGZO-GDM which can quickly remove a residual charge in a panel when the power supply is turned off, and a driving method of the liquid crystal display device. Each bistable circuit that configures a shift register includes a thin film transistor TI for increasing a potential of an output terminal based on a first clock, a region netA connected to a gate terminal of the thin film transistor TI, a thin film transistor TC for lowering a potential of the region netA, and a region netB connected to a gate terminal of the thin film transistor TC. In such a configuration, a power supply off sequence includes a display off sequence and a gate off sequence. The gate off sequence includes at least a gate-bus-line discharge step (t14 to t15), a netB discharge step (t15 to t16), and a netA discharge step (t16 to t17). |
| 主权项 |
1. A liquid crystal display device comprising: a substrate configuring a display panel; and a plurality of switching elements formed on the substrate, in which an oxide semiconductor is used as a semiconductor layer configuring the plurality of switching elements, the liquid crystal display device comprising:
a plurality of video signal lines for transmitting a video signal; a plurality of scanning signal lines that intersect with the plurality of video signal lines; a plurality of pixel formation portions arranged in a matrix shape corresponding to the plurality of video signal lines and the plurality of scanning signal lines; a scanning signal line drive circuit that includes a shift register formed of a plurality of bistable circuits that sequentially output pulses based on a clock signal, and selectively drives the plurality of scanning signal lines based on the pulses output from the shift register, the plurality of bistable circuits being provided in one-to-one correspondence with the plurality of scanning signal lines; a power supply state detector that detects ON/OFF states of power supply provided from outside; and a drive controller that outputs the clock signal, a reference potential as a potential which becomes a reference of operations of the plurality of bistable circuits, and a clear signal for initializing states of the plurality of bistable circuits, and controls an operation of the scanning signal line drive circuit, wherein the plurality of video signal lines, the plurality of scanning signal lines, the plurality of pixel formation portions, and the scanning signal line drive circuit are formed on the substrate, each of the plurality of bistable circuits has
an output-node connected to the scanning signal line,an output-node control switching element having a first electrode to which the clock signal is applied, a second electrode connected to the output-node, and a third electrode to which the reference potential is applied,an output control switching element having a second electrode to which the clock signal is applied, and a third electrode connected to the output-node,a first-node connected to a first electrode of the output control switching element,a first first-node control switching element having a second electrode connected to the first-node, and a third electrode to which the reference potential is applied,a second first-node control switching element having a first electrode to which the clear signal is applied, a second electrode connected to the first-node, and a third electrode to which the reference potential is applied,a second-node connected to a first electrode of the first first-node control switching element, anda first second-node control switching element having a first electrode to which the clock signal is applied, a second electrode connected to the second-node, and a third electrode to which the reference potential is applied, the power supply state detector applies a predetermined power supply off signal to the drive controller when the power supply state detector detects an OFF state of the power supply, and when the drive controller receives the power supply off signal, the drive controller controls an operation of the scanning signal line drive circuit so that a first discharge process of discharging a charge in the pixel formation portion is performed and thereafter controls an operation of the scanning signal line drive circuit so that a second discharge process of discharging a charge on the scanning signal line, a charge of the second-node, and a charge of the first-node is performed. |
