Display having vertical gate line extensions and minimized borders

摘要

A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

主权项

1. A display, comprising:
rows and columns of pixels, each pixel having at least one transistor with a gate; a plurality of gate lines each of which is connected to the gates of the transistors in the pixels of a respective one of the rows; a plurality of data lines running perpendicular to the gate lines; a plurality of gate line extensions each of which runs parallel to the data lines and each of which is connected to a respective one of the gate lines, wherein each gate line extension runs under a respective one of the data lines and is separated from that gate line by a layer of dielectric, wherein the plurality of gate line extensions are all of equal length; a layer of liquid crystal material; electrodes coupled to the transistors, wherein the transistors apply voltages to the electrodes that create electric fields in the layer of liquid crystal material; and vias that connect the gate lines extensions to the gate lines.