发明名称 Method for convergence analysis based on thread variance analysis
摘要 Basic blocks within a thread program are characterized for convergence based on variance analysis or corresponding instructions. Each basic block is marked as divergent based on transitive control dependence on a block that is either divergent or comprising a variant branch condition. Convergent basic blocks that are defined by invariant instructions are advantageously identified as candidates for scalarization by a thread program compiler.
申请公布号 US9292265(B2) 申请公布日期 2016.03.22
申请号 US201213467765 申请日期 2012.05.09
申请人 NVIDIA Corporation 发明人 Grover Vinod;Lee Yunsup;Kong Xiangyun;Chakrabarti Gautam;Krashinsky Ronny M.
分类号 G06F9/312;G06F9/45;G06F9/38 主分类号 G06F9/312
代理机构 Artegis Law Group, LLP 代理人 Artegis Law Group, LLP
主权项 1. A computer-implemented method for characterizing a thread program, the method comprising: marking each basic block associated with the thread program as being convergent, wherein each basic block includes a plurality of instructions and starts with a label instruction and is terminated by a control transfer instruction; marking a set of instructions associated with each basic block as being invariant; initializing a work list that includes instructions that are known to be variant relative to the set of instructions; selecting a first instruction from the work list; marking the first instruction as variant; adding successor instructions to the work list based on the first instruction; and propagating a divergence attribute to identify associated basic blocks as divergent, and to identify instructions within the associated basic blocks as variant.
地址 Santa Clara CA US