TIE-OFF STRUCTURES FOR MIDDLE-OF-LINE (MOL) MANUFACTURED INTEGRATED CIRCUITS, AND RELATED METHODS

摘要

Tie-off structures for middle-of-line (MOL) manufactured integrated circuits, and related methods are disclosed. As a non-limiting example, the tie-off structure may be used to tie-off a drain or source of a transistor to the gate of the transistor, such as provided in a dummy gate used for isolation purposes. In this regard in one aspect, a MOL stack is provided that includes a metal gate connection that is coupled to a metal layer through metal structure disposed in and above a dielectric layer above a gate associated with the metal gate connection. By coupling the metal gate connection to the metal layer, the gate of a transistor may be coupled or “tied-off” to a source or drain element of the transistor. This may avoid the need to etch the metal gate connection provided below the dielectric layer to provide sufficient connectivity between the metal layer and the metal gate connection.

主权项

1. A middle-of-line (MOL) stack in an integrated circuit (IC), comprising:
a substrate; a gate structure of a transistor overlying the substrate, the gate structure comprising:
a gate region coupled to the substrate; anda metal gate connection overlying the gate region; a first metal layer overlying the substrate, the first metal layer coupled to one of a drain or source of the transistor; a dielectric layer overlying the gate structure and the first metal layer; and a metal structure disposed in and above the dielectric layer, the metal structure electrically coupled to the metal gate connection and the first metal layer.