| 摘要 |
A processor (100). The processor (100) comprises at least one executing unit group (121, 122, 12k). Each of the at least one executing unit group (121, 122, 12k) comprises multiple serially connected executing units and at least one resource unit (110). Each of the at least one resource unit (110) is serially connected to one or more executing unit groups among the at least one executing unit group (121, 122, 12k) separately. According to the processor, the executing units in each executing unit group are serially connected, and each resource unit is serially connected to one or more executing unit group, so that only a small quantity of executing units are directly connected to each resource unit, wiring congestion at the resource unit and the resulted signal interference are avoided, and therefore the wiring area of a chip can be reduced, and the signal quality of the chip can be improved. |
