SEMICONDUCTOR MEMORY DEVICE

摘要

In an embodiment, a semiconductor memory device includes a memory cell that includes a first inverter having a first input and a first output, and a second inverter having a second input connected to the first output and a second output connected to first input portion. A first bit line that is connected to the first output of the first inverter via a first transmission transistor. A second bit line is connected to the second output of the second inverter via a second transmission transistor. A first p channel MOS transistor has a drain connected to the first bit line, and a gate connected to the second bit line. A second p channel MOS transistor has a drain connected to the second bit line and a gate connected to the first bit line.

主权项

1. A semiconductor memory device, comprising:
a memory cell including:
a first inverter having a first input and a first output, anda second inverter having a second input connected to the first output and a second output connected to the first input; a first bit line connected to the first output via a first transmission transistor; a second bit line connected to the second output via a second transmission transistor; a first p channel metal-oxide-semiconductor (MOS) transistor having a drain connected to the first bit line and a gate connected to the second bit line; and a second p channel MOS transistor having a drain connected to the second bit line and a gate connected to the first bit line.