SEMICONDUCTOR MEMORY DEVICE COMPENSATING DIFFERENCE OF BITLINE INTERCONNECTION RESISTANCE

摘要

A semiconductor memory device includes a bit line sense amplifier, a first column select gate, and a second column select gate. The bit line sense amplifier senses an electric potential difference between a bit line and a complementary bit line during a sensing operation for memory cells. The first column select gate transfers an electric potential on the bit line to a local sense amplifier based on a column select signal. The second column select gate transfers an electric potential on the complementary bit line to the local sense amplifier based on the column select signal. The first and second column select gates have different current drive abilities to compensate a difference in bit line interconnection resistance.

主权项

1. A semiconductor memory device, comprising:
a memory cell array including a plurality of memory cells; a bit line sense amplifier to sense an electric potential difference between a bit line and a complementary bit line during a sensing operation for the memory cells; a first column select gate to transfer an electric potential on the bit line to a local sense amplifier based on a column select signal; and a second column select gate to transfer an electric potential on the complementary bit line to the local sense amplifier based on the column select signal, wherein the first and second column select gates have different current drive abilities from each other to compensate a difference in bit line interconnection resistance.