METHOD AND APPARATUS TO TEST SECURE BLOCKS USING A NON-STANDARD INTERFACE

摘要

A method and apparatus for testing secure blocks is provided. The method begins when instructions for testing a secure memory are loaded using a parallel testing interface. Instructions for testing the non-secure memory may be resident on the device as Built-In-Self-Test (BIST) instructions. In that case, the instructions are then accessed through the standard test access. Testing occurs simultaneously for the secure memory and the non-secure memory using both the parallel interface and the standard test interface. Testing both the secure memory blocks and the non-secure memory blocks using the parallel and standard test interfaces saves time during the test process.

主权项

1. A method of testing secure blocks, comprising:
loading instructions for testing a secure memory through a parallel test interface; accessing instructions for testing a non-secure memory through a standard test interface; and testing simultaneously the secure memory using the parallel test interface and the non-secure memory using the standard test interface.