CACHE MEMORY SYSTEM AND OPERATING METHOD THEREOF

摘要

A cache memory apparatus includes a tag comparator configured to compare upper bits of each of pieces of tag data included in a set indicated by a set address that is received with upper bits of a tag address that is received, compare other bits of each of the pieces of the tag data with other bits of the tag address, and determine whether there is a cache hit or a cache miss based on results of the comparisons, and an update controller configured to, in response to the cache miss being determined, determine, as an update candidate, a piece among pieces of cache data included in the set and corresponding to the pieces of the tag data, based on the result of the comparison of the upper bits of each of the pieces of the tag data and the upper bits of the tag address, and update the update candidate with new data.

主权项

1. A cache memory apparatus comprising:
a data memory configured to store pieces of cache data corresponding to pieces of data stored in a main memory; a tag memory configured to store pieces of tag data respectively corresponding to the pieces of the cache data, each of the pieces of the tag data comprising N bits; a tag comparator configured to
compare upper K bits, wherein 1≦Kdetermine a piece among the pieces of the cache data as an update candidate based on the result of the comparison of the upper K bits of each of the pieces of the tag data and the upper K bits of the tag address, andupdate the update candidate with new data.