发明名称 INTEGRATED CIRCUIT AND METHOD OF DETECTING A DATA INTEGRITY ERROR
摘要 An integrated circuit comprises a write bus coupled to a register for storing control data. A storage unit is arranged to store reference signature data encoding a reference collective state of the register. First logic circuitry generates actual signature data encoding the actual collective state of the register. Second logic circuitry is coupled to the storage unit, receives the actual signature data and compares the actual signature data with the reference signature data. The second logic circuitry comprises an alert output to provide an alert signal in response to the comparison identifying a difference between the actual signature data and the reference signature data, thereby ensuring detection of a data integrity error in respect of the register. An alert inhibitor comprises a control input and is responsive to the control input and arranged to inhibit selectively onward propagation of the alert signal from the alert output.
申请公布号 US2016077904(A1) 申请公布日期 2016.03.17
申请号 US201414483262 申请日期 2014.09.11
申请人 WENDEL DIRK;ROHLEDER MICHAEL;SCHLAGENHAFT ROLF 发明人 WENDEL DIRK;ROHLEDER MICHAEL;SCHLAGENHAFT ROLF
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人
主权项 1. An integrated circuit comprising: a write bus operably coupled to a register for storing control data; a storage unit arranged to store reference signature data encoding a reference collective state of the register; first logic circuitry arranged to generate actual signature data encoding the actual collective state of the register; second logic circuitry operably coupled to the storage unit and arranged to receive the actual signature data and compare the actual signature data with the reference signature data stored by the storage unit; and an alert inhibitor; wherein the second logic circuitry comprises an alert output to provide thereat an alert signal in response to the comparison identifying a difference between the actual signature data and the reference signature data, thereby ensuring detection of a data integrity error in respect of the register; and the alert inhibitor comprises a control input, the alert inhibitor being responsive to the control input and arranged to inhibit selectively onward propagation of the alert signal from the alert output.
地址 GRASBRUNN DE