PROCESS ADAPTED TO THE MANUFACTURE OF D-RAM

摘要

The method is applicable to manufacturing esp. 1 transistor - 1 capacitor D-RAM cell. The first process is to form a field oxide layer (16) and channel stop region (18). The second process is to etch nitrogenated silicon layer (12) and to inject intrinsic substance. The third process is to diffuse the intrinsic substance under the minifield oxide layer (30). The fourth process is to form a source and drain region (37,38) and protective region (40). The alluminium bit line forming process follows.