发明名称 Encoding scheme for 3D vertical flash memory
摘要 Method, computer program implementation and system to encode data to be written to a memory which comprises writing first data 512 to a memory and then reading the same first data 514 and further analysing to determine if an error is present 516, as caused by electron fast de-trapping for example; encoding second data based on the analysis of the first data 518, the encoded data written to a position (or cell) adjacent to the actual error (if found), and writing the encoded second data to the memory at the particular position 520. The memory may be a non volatile memory system (NVM) such as a solid state drive including a three dimensional flash memory comprising a plurality of word lines having single level or multi-level cells. The reading of the memory may be based on a predetermined threshold which may be a read voltage level threshold. The analysing stage may further comprise of a comparison of the first read data to a copy of the first data which is different (not similar) to the first data. Analysis also indentifies the error position of the memory cell such that the position of the second data is adjacent the identified error position, and which could be located at a different word line. The encoding may be performed by a flash memory controller. The second data may be written to memory at the position to cause intentional inter-cell interference (coupling) with the first data.
申请公布号 GB2530175(A) 申请公布日期 2016.03.16
申请号 GB20150015523 申请日期 2015.09.02
申请人 HGST NETHERLANDS B.V. 发明人 ZVONIMIR Z BANDIC;YONGJUNE KIM;ROBERT MATEESCU;SEUNG-HWAN SONG
分类号 G11C16/10;G06F11/10;G11C11/56;G11C16/04;G11C16/20;G11C16/34;H01L27/115 主分类号 G11C16/10
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