INSTRUCTION SET SPECIFIC EXECUTION ISOLATION

摘要

A system on a chip (SoC) or other integrated system can include a first processor and at least one additional processor sharing a page table. The shared page table can include permission bits including a first permission indicator supporting the processor and a second permission indicator supporting at least one of the at least one additional processor. In one implementation, that page table can include at least one additional bit to accommodate encodings that support the at least one additional processor. When one of the processors accesses memory, a method is performed in which a shared page table is accessed and a value of the permission indicator(s) is read from the page table to determine permissions for performing certain actions including executing a page; read/write of the page; or kernel mode with respect to the page.