发明名称 Electronic package with narrow-factor via including finish layer
摘要 Electronic package 100 that includes an electrically conductive pad 112, a package insulator layer including a non-conductive material, the package insulator layer 102 being planar, and a via 106; the via is formed within the package insulator layer and electrically coupled to the electrically conductive pad; the via includes a conductor extending vertically through at least part of the package insulator layer and having a first end proximate the electrically conductive pad and a second end opposite the first end and a finish layer 110 secured to the second end of the conductor, the finish layer including a gold compound. The first via may comprise a second via where the first and second vias may be made of different conductive materials. The pad may be coupled to a silicon bridge which may also comprise ceramic or organic interposers.
申请公布号 GB2530152(A) 申请公布日期 2016.03.16
申请号 GB20150012070 申请日期 2015.07.10
申请人 INTEL CORPORATION 发明人 RAJASEKARAN SWAMINATHAN;SAIRAM AGRAHARAM;AMRUTHAVALLI PALLAVI ALUR;RAM VISWANATH;WEI-LUN KANE JEN
分类号 H01L23/48;H01L21/768;H01L23/498 主分类号 H01L23/48
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