Buffer circuit of semiconductor apparatus

摘要

A buffer circuit of a semiconductor apparatus includes a sensing circuit configured to sense input signals according to a data strobe signal, generate latch control signals, provide the latch control signals at nodes, and remove parasitic components of the nodes in response to a clock signal; and a latch circuit configured to generate and latch output data in response to the latch control signals.

主权项

1. A buffer circuit of a semiconductor apparatus, comprising:
a sensing unit configured to sense a voltage level difference of differential input signals and generate latch control signals, during an activation period of a data strobe signal; an activation unit configured to activate a current path of the sensing unit in response to the data strobe signal; a compensation unit configured to serve as a negative impedance component in response to a clock signal and remove parasitic components of nodes; and a latch circuit configured to generate and latch output data in response to the latch control signals.