| 发明名称 | Nonvolatile semiconductor memory device | ||
| 摘要 | A nonvolatile semiconductor memory device according to an embodiment includes a control circuit configured to cause data to be stored in a memory cell by setting the memory cell to be included in one of resistance value distributions. The control circuit is configured to set a first resistance value distribution and a second resistance value distribution, the second resistance value distribution having a resistance value larger than that of the first resistance value distribution, and to set a second width to be larger than a first width, the second width being a width between a second upper limit value of the second resistance value distribution and a second lower limit value of the second resistance value distribution, and the first width being a width between a first upper limit value of the first resistance value distribution and a first lower limit value of the first resistance value distribution. | ||
| 申请公布号 | US9286978(B2) | 申请公布日期 | 2016.03.15 |
| 申请号 | US201414208242 | 申请日期 | 2014.03.13 |
| 申请人 | KABUSHIKI KAISHA TOSHIBA | 发明人 | Minemura Yoichi;Tsukamoto Takayuki;Okawa Takamasa;Kanno Hiroshi;Yoshida Atsushi |
| 分类号 | G11C11/00;G11C13/00;G11C11/56 | 主分类号 | G11C11/00 |
| 代理机构 | Oblon, McClelland, Maier & Neustadt, L.L.P. | 代理人 | Oblon, McClelland, Maier & Neustadt, L.L.P. |
| 主权项 | 1. A nonvolatile semiconductor memory device, comprising: a memory cell disposed between a first line and a second line and including a variable resistance element; and a control circuit configured to cause data of 2 bits or more to be stored in the memory cell by setting the memory cell to be included in one of resistance value distributions, and to apply a voltage to the memory cell in a write operation, the control circuit being configured to set a first resistance value distribution and a second resistance value distribution, the second resistance value distribution having a resistance value larger than that of the first resistance value distribution, and to set a second width to be larger than a first width, the second width being a width between a second upper limit value as an upper limit value of the second resistance value distribution and a second lower limit value as a lower limit value of the second resistance value distribution, and the first width being a width between a first upper limit value as an upper limit value of the first resistance value distribution and a first lower limit value as a lower limit value of the first resistance value distribution. | ||
| 地址 | Minato-ku JP | ||