Signal conversion circuit, PLL circuit, delay adjustment circuit, and phase control circuit

摘要

A signal conversion circuit, a PLL circuit, a delay control circuit and a phase control circuit for promoting miniaturization and for reducing quantization noise. TSTC does not require a low-pass filter of capacitor Cm with large layout area conventionally required for converting pulse width to voltage, which promotes miniaturization and cost reduction. TSTC 8 generates analog voltage adequate for transition state at boundary where pulse signal transits, which reduces quantization noise, compared with conventional digital PLL circuits.

主权项

1. A signal conversion circuit for generating a signal according to an inputted pulse signal while receiving pulse width of the pulse signal,
wherein the signal conversion circuit takes samples from the pulse signal, converts the pulse signal into binary digital output values comprising two values based on signal values taken as the samples, converts the pulse signal into an analog intermediate output value which is between the two values based on signal values taken as the samples only when the digital output values are changing between the two values, and generates a converted signal having the digital output values and the intermediate output value.