发明名称 データ処理装置、データ処理方法及びデータ共有システム
摘要 In order to realize efficient memory access, addresses in the same bank in a memory are consecutively accessed. A data processing apparatus performs mapping so as to store data, which are the same data, with use of the first arrangement and the second arrangement, respectively, in different memory areas constituting a memory. When reading a portion of the data, a selecting unit selects one of the arrangements that is more efficient in accessing the portion of the data based on an address range corresponding to the portion of the data according to each arrangement, and an access control unit accesses a memory area corresponding to the selected arrangement. The data is mapped to a position different from a position of the data in terms of relative positions with respect to boundary addresses of blocks each corresponding to the same row address in the same bank.
申请公布号 JP5884037(B2) 申请公布日期 2016.03.15
申请号 JP20120534484 申请日期 2012.02.10
申请人 パナソニックIPマネジメント株式会社 发明人 浅井 幸治
分类号 G06F12/02;G06F12/00 主分类号 G06F12/02
代理机构 代理人
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