发明名称 |
EXCESS LOOP DELAY COMPENSATION (ELC) FOR AN ANALOG TO DIGITAL CONVERTER (ADC) |
摘要 |
In one embodiment, a circuit includes a quantizer configured to convert an analog input signal to a digital signal. The quantizer includes a first feedback path including a first digital to analog converter (DAC) coupled from an output of the quantizer to a summing junction that is coupled to an input of the quantizer. The first feedback path converts the digital signal to a first corresponding analog value for combining with the analog input signal at the summing junction. Also, the quantizer includes a plurality of excess loop delay (ELD) compensation paths coupled to the summing junction configured to compensate for excess loop delay from a second feedback path coupled from the output of the quantizer to input of the quantizer via a loop filter. Second DACs in the second feedback path convert the digital signal to a second corresponding analog value for combining with the analog input signal. |
申请公布号 |
WO2016036654(A1) |
申请公布日期 |
2016.03.10 |
申请号 |
WO2015US47709 |
申请日期 |
2015.08.31 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
DAGHER, ELIAS HANI;YAMAMOTO, KENTARO;ALLADI, DINESH JAGANNATH |
分类号 |
H03M3/00 |
主分类号 |
H03M3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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