RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES

摘要

Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.

主权项

1. A device, comprising:
an integrated circuit substrate comprising a passivation opening having a sidewall that exposes a dielectric layer of the integrated circuit substrate; a first barrier layer deposited on the sidewall that prohibits exposure of the dielectric layer to a release chemical employable to release a micro-electro-mechanical (MEMS) device integrated with the integrated circuit substrate, wherein the first barrier layer comprises a metal; and a second barrier layer comprising an electrically insulating layer deposited on a portion the first barrier layer, wherein the second barrier layer is at least partially resistant to the release chemical.