Enhancement Mode III-N HEMTs

摘要

A III-N semiconductor device that includes a substrate and a nitride channel layer including a region partly beneath a gate region, and two channel access regions on opposite sides of the part beneath the gate. The channel access regions may be in a different layer from the region beneath the gate. The device includes an AlXN layer adjacent the channel layer wherein X is gallium, indium or their combination, and a preferably n-doped GaN layer adjacent the AlXN layer in the areas adjacent to the channel access regions. The concentration of Al in the AlXN layer, the AlXN layer thickness and the n-doping concentration in the n-doped GaN layer are selected to induce a 2DEG charge in channel access regions without inducing any substantial 2DEG charge beneath the gate, so that the channel is not conductive in the absence of a switching voltage applied to the gate.

主权项

1. A method of forming a III-N semiconductor device, comprising:
forming a nitride channel layer, the composition of the nitride channel layer being selected from the group consisting of nitrides of gallium, indium, aluminum, and combinations thereof; forming an AlXN layer adjacent the channel layer in the areas adjacent to the channel access regions but not in the area adjacent to the first channel region, wherein X is selected from the group consisting of gallium, indium or their combination; and forming a gate, wherein the nitride channel layer includes a first channel region beneath the gate, and channel access regions on opposite sides of the first channel region; wherein the concentration of Al and thickness of the AlXN layer is selected to induce a 2DEG charge in the channel access regions adjacent the AlXN layer without inducing any substantial 2DEG charge in the first channel region, so that a channel comprising the 2DEG charge is not conductive in the absence of a switching voltage applied to the gate, but is conductive when a switching voltage greater than a device threshold voltage is applied to the gate.