EFFICIENT LOADING AND STORING OF DATA

摘要

Methods and apparatus for efficient loading of data from memory to registers and storing of data from registers to memory are described. In an embodiment, a processor comprises a data structure to which addresses which are used for load operations are pushed. Instead of independently generating addresses for a store operation, addresses are popped from the data structure and either used directly or an optional offset may first be applied to the popped address. In this way, a store operation and a load operation may be performed in parallel because they do not both require use of the logic which independently generates addresses for load/store operations. In various examples, the data structure is a FIFO structure.

主权项

1. A method of generating one or more addresses for a data store operation in a processor, the method comprising:
in response to a data load instruction, generating and storing one or more addresses for the data load instruction in a data structure; and in response to a data store instruction,
accessing one or more stored addresses in the data structure, wherein the one or more stored addresses accessed in response to the data store instruction were previously generated by an address unit in the processor and stored in the data structure in response to a corresponding and separate data load instruction, anddetermining one or more addresses for use in a data store operation triggered by the data store instruction, wherein the one or more addresses for use in the data store operation are determined based on the one or more accessed addresses.