| 摘要 |
A data processing system may have a strict separation of processor tasks and data categories, wherein processor tasks are separated into software loading and initialisation (loading processor) and data processing (main processor) and data categories are separated into address data, instructions, internal function data, target data of the main processor and target data of the loading processor. In this way, protection is provided against malware, irrespective of the transmission medium and of the type of malware, and also against future malware and without performance losses in the computer system. |
| 主权项 |
1. A data processing system including:
at least one main processor, at least one permanent data memory, at least one random access memory, at least one input/output hardware unit connected to the at least one main processor at least one instruction bus, and at least one operand bus, wherein the at least one main processor communicates with the at least one random access memory via the at least one instruction bus and via the at least one operand bus and separately from these communicates bi-directionally with the at least one permanent data memory, the data processing system further including: at least one loading processor, at least one permanent software memory, and at least one external software memory, wherein the at least one loading processor is configured to communicate bidirectionally with the at least one permanent software memory and the at least one external software, memory, and wherein the at least one loading processor is configured to communicate with the at least one random access memory via at least one instruction bus and via at least one operand bus separately and independently from the at least one main processor,
wherein the communication between the at least one main processor and the at least one random access memory takes place via the at least one instruction bus and the at least one operand bus,wherein the communication between the at least one loading processor and the at least one random access memory takes place via the at least one instruction bus and the at least one operand bus, andwherein both the communication between the at least one main processor and the at least one input/output hardware unit, as well as the at least one permanent data memory, and the communication between the at least one loading processor and the at least one external software memory, as well as the at least one permanent software memory, are controlled via access attributes. |
