MULTI-CHARGE REGION MEMORY CELLS FOR A VERTICAL NAND DEVICE

摘要

A memory cell can be formed with a pair of charge storage regions. The pair of charge storage regions can be two portions of a charge storage region that are located at the same level and are positioned adjacent to two different control gate electrodes. Alternately, the pair of charge storage regions can be two disjoined structures located on opposite sides of a portion of a semiconductor channel. Yet alternately, the pair of charge storage regions can be two disjoined structures located at the same level, and on two laterally split semiconductor channel. The memory cell can be employed to store two bits of information within the pair of charge storage regions located at the same level within a vertical memory string that employs a single memory opening.

主权项

1. A memory device, comprising:
a substrate having a major surface; a first plurality of memory cells arranged in a first string extending in a first direction substantially perpendicular to the major surface of the substrate in a plurality of device levels, wherein each of the first plurality of memory cells is positioned in a respective one of the plurality of device levels above the substrate; a first select gate electrode located between the major surface of the substrate and the first plurality of memory cells; and a second select gate electrode located above the first plurality of memory cells; wherein each memory cell in the first string further comprises:
a portion of a first control gate electrode extending in a second direction substantially parallel to the major surface; anda portion of a second control gate electrode extending in the second direction, located at a same level as the respective first control gate electrode, and spaced apart from the respective first control gate electrode in a third direction substantially parallel to the major surface and transverse to the second direction; and wherein for each memory cell in the first string, the respective first control gate electrode is electrically insulated from the respective second control gate electrode.