发明名称 クロック発生装置、サーバシステムおよびクロック制御方法
摘要 In order to provide a multiplexed clock generation apparatus in which synchronization between circuits based on a received clock is not lost, a clock generation apparatus is made to have a clock determination unit which determines whether a cycle shift time between a first clock signal and a second clock signal satisfies a predetermined condition or not and a clock switching unit which switches the first clock signal and the second clock signal based on determination of the clock determination unit. The clock determination unit determines that clock switching is possible when, as the predetermined condition, a first condition that a cycle shift time is equal to or more than a period from a setup start time to a hold end time of a signal specified for a clock bus and a second condition that the cycle shift time exists before the next setup start time are satisfied together.
申请公布号 JP5880603(B2) 申请公布日期 2016.03.09
申请号 JP20140055794 申请日期 2014.03.19
申请人 日本電気株式会社 发明人 丹野 祐樹
分类号 G06F1/04 主分类号 G06F1/04
代理机构 代理人
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