发明名称 割込監視装置、およびコンピュータシステム
摘要 An interrupt monitoring apparatus includes a storage that stores a given threshold that corresponds to an external interrupt notification; a measuring circuit that measures time that elapses from a time when the external interrupt notification is received until a time when dispatch notification is received from a CPU; a comparing circuit that compares the given threshold and the time measured by the measuring circuit; and an output circuit that outputs to the CPU, a comparison result obtained by the comparing circuit.
申请公布号 JP5880564(B2) 申请公布日期 2016.03.09
申请号 JP20130534487 申请日期 2011.09.20
申请人 富士通株式会社 发明人 山下 浩一郎;山内 宏真;鈴木 貴久;栗原 康志;大舘 尚記
分类号 G06F9/48 主分类号 G06F9/48
代理机构 代理人
主权项
地址