发明名称 Technique for optimizing static random-access memory passive power consumption
摘要 A static read-only memory (SRAM) includes one or more bit cell rows that each includes a collection of bit cells. Each bit cell row is coupled to two or more different wordlines, where each wordline associated with a given bit cell row provides memory access to a different subset of bit cells within that bit cell row.
申请公布号 US9281054(B2) 申请公布日期 2016.03.08
申请号 US201213680674 申请日期 2012.11.19
申请人 NVIDIA Corporation 发明人 Huang Yongchang;Ma Jiping;Shi Xiangning
分类号 G11C7/12;G11C11/418;G11C8/08;G11C11/417;G11C11/408;G11C11/4091 主分类号 G11C7/12
代理机构 Artegis Law Group, LLP 代理人 Artegis Law Group, LLP
主权项 1. A computer-implemented method for performing a memory access operation with a memory module, the method comprising: identifying a row of bit cells residing within the memory module; determining that the memory access operation involves a subset of bit cells within the row of bit cells, wherein each bit cell in the subset of bit cells is indexed with a numerical value having a first parity; pre-charging the subset of bit cells via a wordline coupled to the subset of bit cells without pre-charging bit cells within the row of bit cells indexed with a numerical value having a second parity; and performing the memory access operation with the subset of bit cells.
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