发明名称 |
Integrated circuit through-substrate via system with a buffer layer and method of manufacture thereof |
摘要 |
An integrated circuit substrate via system, and method of manufacture therefor, includes: a substrate having a substrate via in the substrate; a buffer layer patterned over the substrate via, the buffer layer having a planar surface; and a substrate via cap patterned over the buffer layer, the substrate via cap having a planar surface based on the planar surface of the buffer layer. |
申请公布号 |
US9281274(B1) |
申请公布日期 |
2016.03.08 |
申请号 |
US201314040413 |
申请日期 |
2013.09.27 |
申请人 |
STATS ChipPAC Ltd. |
发明人 |
Zhao Xing;Yong Chang Bum;Na Duk Ju;Aung Kyaw Oo;Ji Ling |
分类号 |
H01L23/48;H01L23/52;H01L29/40;H01L23/532;H01L21/768 |
主分类号 |
H01L23/48 |
代理机构 |
Ishimaru & Associates LLP |
代理人 |
Ishimaru & Associates LLP |
主权项 |
1. A method of manufacturing an integrated circuit substrate via system comprising:
providing a substrate having a substrate via in the substrate, the substrate via has a top surface and a bottom surface exposed from the substrate; patterning a photoresist layer over the substrate; patterning a buffer layer over the substrate via in the photoresist layer, the buffer layer has a planar surface; patterning a substrate via cap over the buffer layer in the photoresist layer, the substrate via cap has a planar surface based on the planar surface of the buffer layer; removing the photoresist layer; and patterning the substrate via cap and patterning the buffer layer include reducing a thickness of an adhesive layer of the substrate via cap to increase conductivity of the substrate via cap to compensate for increased resistivity of the buffer layer. |
地址 |
Singapore SG |