Implementing inverted master-slave 3D semiconductor stack

摘要

A method and apparatus are provided for implementing an enhanced three dimensional (3D) semiconductor stack. A chip carrier has an aperture of a first length and first width. A first chip has at least one of a second length greater than the first length or a second width greater than the first width; a second chip attached to the first chip, the second chip having at least one of a third length less than the first length or a third width less than the first width; the first chip attached to the chip carrier by connections in an overlap region defined by at least one of the first and second lengths or the first and second widths; the second chip extending into the aperture; and a heat spreader attached to the chip carrier and in thermal contact with the first chip for dissipating heat from both the first chip and second chip.

主权项

1. A structure for implementing an enhanced three dimensional (3D) semiconductor stack comprising:
a chip carrier having an aperture of a first length and first width; a first chip larger than said aperture and having a second length greater than the first length and a second width greater than the first width; a second chip smaller than said aperture and attached to said first chip, said second chip having a third length less than the first length and a third width less than the first width; said second chip extending into the aperture; said first chip attached to said chip carrier by connections in an overlap region defined by the first and second lengths and the first and second widths; said chip carrier providing power and carrying interface signals to said first chip in said overlap region eliminating need for through-silicon-vias; said first chip providing power and carrying interface signals to said second chip; and a heat spreader attached to said chip carrier and in thermal contact with said first chip for dissipating heat from both said first chip and said second chip.